Digital demodulator with interpolation for linearly amplitude-modulated data signals

摘要

A digital demodulator of data signals transmitted by linear amplitude modulation of a carrier, sampled under the control of clock pulses CK1, comprises an interpolating unit UIN including a tapped delay line TDL whose outputs carry, at a given instant, respective signal samples received during different clock cycles. These signal samples are fed to a transversal filter FIN also receiving two sets of interpolation coefficients ak, bk read out from respective memory sections ME1, ME2. The signal samples from the several delay-line taps are multiplied in filter FIN by the two sets of coefficients ak and bk, under the control of a pulse train CK2 and another pulse train CK3 of the same cadence but phase-shifted with reference to the former, and the two sets of resulting products are respectively summed in a digital adder SM and alternately read out to a phase corrector CJ recovering the phase coherence of the demodulated baseband signal.