| 摘要 |
1518682 AFC systems MATSUSHITA ELECTRIC INDUSTRIAL CO Ltd AND NIPPON VICTOR KK 20 June 1975 [25 June 1974] 26296/75 Heading H3A In a phase lock loop including a phase comparator 13, a controlled oscillator 17 and an adder 16 for angle modulating the oscillator 17 by a modulation signal at 10, loss of loop lock due to a high level modulation signal or frequency fluctuation of the oscillator output due to drift or temperature is prevented by deriving through an arrangement 19 responsive to each exceedance of a normal operating limit of the phase comparator 13 to provide a stepped waveform which is added at 14 to the phase comparator output to provide a control signal for the oscillator 17. The addition of a correction signal at 14 increases the effective operational range of the phase comparator and the lock-in range. The circuit 19 for producing a stepped waveform from the beat frequency error output of the comparator 13 includes a differentiator 21 followed by detectors 22, 24, wave shapers 23, 26 for causing a counter 27 to count up or down. A D/A converter 28 converts the counter ouput into a stepped waveform which is combined with the original beat signal at adder 14 (see waveforms in Fig. 2) to produce a sinusoidal output. It is mentioned that the counter 27 may be replaced by a shift register and the D/A converter 28 by an integrator. In the alternative embodiment of Fig. 3B, the sense of change in the comparator 13 output are first detected and then differentiated for driving the counter.
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