发明名称 TESTING EQUIPMENT FOR LOGICAL CIRCUIT
摘要 PURPOSE:To make it possible to test the logical circuit composed of a dynamic circuit by generating a refresh pattern for holding a measured body in an operation state in the time between test pattern generation and the next pattern generation.
申请公布号 JPS5376641(A) 申请公布日期 1978.07.07
申请号 JP19760152403 申请日期 1976.12.17
申请人 NIPPON ELECTRIC CO 发明人 MATSUKAWA YASUSHI
分类号 G06F11/22;G01R31/28;G06F11/00 主分类号 G06F11/22
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