发明名称 TEST CIRCUIT OF LOGICAL DEVICE
摘要 PURPOSE:To decrease the number of the element for a test circuit by connecting a pair of the adverse conductor type transistors in a tree branch formation to both the circuit which sends a data to the prescribed ratch and the circuit which reads a data from the prescribed ratch.
申请公布号 JPS5362954(A) 申请公布日期 1978.06.05
申请号 JP19760138204 申请日期 1976.11.17
申请人 FUJITSU LTD 发明人 UENO SEIJIROU;HASHIGUCHI KOUJI
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
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