发明名称 LOGIC CONTROL METHOD AND DEVICE FOR SIMULTANEOUSLY OPERATING ANY NUMBER OF PLURAL DEVICES
摘要 <p>An electronic data processing system which utilizes a variable timing period that is varied in accordance with the access time of the digital devices or circuits utilized in each step of the data processing program. In one embodiment, the data processing system is a computer which performs the basic arithmetic and logical operations. The computer utilizes three memories which have different access times. One memory stores instruction words specifying steps in a computer program for performing basic arithmetic and logical operations involving predetermined data words; another memory stores the data words; and, the third memory stores control words specifying the various machine operations required to execute the corresponding instruction. The three memories can be read out simultaneously, two at a time, or one at a time. In each case, the timing strobe which initiates the next step in the program is generated immediately after the slowest memory utilized in that step is ready for the next readout. Thus, the timing period in this embodiment varies in accordance with the access time of the slowest memory used in each step of the program.</p>
申请公布号 JPS5361935(A) 申请公布日期 1978.06.02
申请号 JP19770135214 申请日期 1977.11.10
申请人 KEARNEY & TRECKER CORP 发明人 RICHIYAADO KATSUDODERU
分类号 G05B19/05;G06F1/04;G06F9/30;G06F9/44 主分类号 G05B19/05
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