| 摘要 |
PURPOSE:To obtain a clock synchronously with a digital signal by integrating a frequency difference between a clock frequency and the bit frequency of an input digital signal, converting the frequency difference into a frequency control signal and adding the signal to the frequency control signal of a variable frequency generating means. CONSTITUTION:A frequency difference detection means 18 detects a frequency difference between the frequency fc of an output clock and the reference frequency fN of a reference signal. An integration means 19 integrates the detected frequency difference. A frequency control signal adding means 20 converts the result of integration into a frequency signal to add the signal to the frequency control signal of the variable frequency generating means. Thus, even when the bit frequency fb of the input digital signal is lower, since no synchronizing step-out takes place, the variable frequency oscillating circuit with high stability and narrow capture range is applied to the variable frequency generating means. |
