发明名称 VERTICAL DEFLECTION CIRCUIT
摘要 <p>This invention relates to improvements in a vertical deflection circuit employing a class D amplifier. The circuit comprises a pulse width modulator for converting a sawtooth waveform signal to a width modulated pulse train, a switch mode power amplifier for amplifying said width modulated pulse train, a demodulating filter circuit for demodulating said width modulated pulse train to the sawtooth waveform, a damping circuit for preventing a significant power loss in said demodulating filter circuit and a deflection yoke coupled to said demodulating filter circuit, thereby making it possible to reduce power dissipation in the circuit.</p>
申请公布号 CA1031069(A) 申请公布日期 1978.05.09
申请号 CA19750239408 申请日期 1975.11.12
申请人 ENOMOTO, SHIGERU 发明人 ENOMOTO, SHIGERU
分类号 H03K4/62;(IPC1-7):03K4/62 主分类号 H03K4/62
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