发明名称 Microprocessor controlled interconnection apparatus for very high speed integrated circuits
摘要 Microprocessor controlled apparatus for interconnecting at least two very high speed integrated circuit chips having digital inputs and outputs. Included are a local data bus, a microprocessor unit and its associated memory unit, and a plurality of functional interface units. One functional interface unit is connected between the microprocessor and the local bus. The remaining functional interface units are connected between the local bus and one of the integrated circuit chips so that all of the functional interface units are responsive to control commands from the processor and pass data from one integrated circuit chip to another. The circuit chips can be custom or can be customized via substrate interconnection. The data passes in through a functional interface unit from its associated chip and is put onto the local bus by the functional interface unit and transferred to at least one other functional interface unit which in turn passes the data to its associated integrated circuit chip as designated by the microprocessor which controls the flow of data within the interconnection apparatus.
申请公布号 US4964033(A) 申请公布日期 1990.10.16
申请号 US19890293077 申请日期 1989.01.03
申请人 HONEYWELL INC. 发明人 WILLIAMS, PAUL F.
分类号 G06F13/12 主分类号 G06F13/12
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