发明名称 FABRICATING METHOD OF SEMICONDUCTOR CHIP
摘要 <p>PURPOSE:To fully automate the fabrication of a diode chip or the like by containing and conveying divided semiconductor chips while regularly aligning the chips to eliminate the necessity of checking or realigning the aigned chips by a manual work. CONSTITUTION:A semiconductor wafer 1 to be divided into a plurality of chips is so adhered to a retainer jig 2 of transparent member having recesses 2a-2c responsive to the number of chips through wax 3 that the chip regions face oppositely the recesses 2a-2c, respectively. Then, the wafer 1 on the jig 2 is divided into independent chips 1a-1f, the wax 3 is dissolved and removed by solvent in adhered state, and the chips 1a-1f are accommodated in the recesses 2a-2c, respectively of the tool 2.</p>
申请公布号 JPS55145353(A) 申请公布日期 1980.11.12
申请号 JP19790052378 申请日期 1979.04.27
申请人 SHINDENGEN ELECTRIC MFG 发明人 TATEISHI KANICHI
分类号 H01L21/67;H01L21/02;H01L21/301;H01L21/306;H01L21/78 主分类号 H01L21/67
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