发明名称 |
Technique for passivating semiconductor devices |
摘要 |
The specification discloses a technique for passivating a semiconductor device which includes exposing a P-N junction in a multilayered semiconductor body. A mixture of glass and gold is prepared and applied to the exposed P-N junction. A mixture is fired to fuse the glass and gold on the semiconductor body. The carrier lifetime degrading characteristics of the gold reduces the current leakage at the exposed P-N junction. The technique substantially improves the voltage capacity and stability of semiconductor switching devices.
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申请公布号 |
US4077819(A) |
申请公布日期 |
1978.03.07 |
申请号 |
US19760721778 |
申请日期 |
1976.09.09 |
申请人 |
HUTSON, JEARLD L. |
发明人 |
HUTSON, JEARLD L. |
分类号 |
H01L21/22;H01L21/56;H01L23/29;H01L29/167;(IPC1-7):H01L21/22 |
主分类号 |
H01L21/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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