| 摘要 |
PURPOSE: To satisfactorily perform reduction into a submicron region by sepa rately forming active P and N regions while using a self-alignment dopant and using a masking step. CONSTITUTION: A silicon dioxide layer 14 is formed on a silicon substrate 10 and etched, separate collector and base/emitter regions 51 and 52 for bipolar device are formed, and correspondent PMOS and NMOS regions 54 and 55 for PMOS and NMOS devices are formed. Buried layer doping is performed, and an epitaxial layer is grown on an exposed part 14 of the silicon substrate 10. Therefore, a silicon dioxide wall between devices provides perfect insulating isolation between the devices and between the collector region 51 and base/ emitter region 52 of the bipolar device. Thus, because of an oxide wall 30 between the collector 51 and base/emitter 52 of the bipolar device, the minimum distance between the devices can be shortened not more than 0.5 micron. |
