发明名称 Fast multiplier for BCD numbers - has floating point numbers modified before conversion to binary for direct multiplication
摘要 <p>A multiplier for BCD coded numbers allows high speed processing of a floating point number representing a measured parameter and a selected factor. Both the factor (F) and the measured parameter are stored in memories (1, MW) and the outputs are examined (2) to determine the initial positions of the decimal points. A programmed memory (3) generates outputs (S1, S2) for converter circuits (4, 5) to adjust the decimal point position such that modified values consisting of two integers and two decimal places are generated. BCD to binary converters (6, 7, 8) process the modified values that are then multiplied (11).</p>
申请公布号 DE2635658(A1) 申请公布日期 1978.02.09
申请号 DE19762635658 申请日期 1976.08.07
申请人 HARTMANN & BRAUN AG 发明人 KRUG,UDO,ING.
分类号 G06F7/491;G06F7/52;(IPC1-7):06F7/52;01D9/00 主分类号 G06F7/491
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