发明名称 MINNES-STRUKTUR
摘要 1457780 Semiconductor memory devices WESTERN ELECTRIC CO Inc 1 March 1974 [1 March 1973 8 Nov 1973] 9256/74 Heading H1K A semiconductor memory device comprises a first insulator 12 in contact with a surface 11À5 of a semiconductor 11, a second insulator 13 forming an interface 12À5 with the first insulator 12, a metallic layer 14 on the surface 13À5 of the second insulator 13, and an impurity dispersed in the interface region 12À5 in a surface concentration between about 10<SP>14</SP> and 2 x 10<SP>15</SP> atoms per square cm., so as to supply states for the capture of charges in the interface region 12À5. The impurity may be tungsten, tantalum, platinum, niobium, iridium or a mixture thereof. The first insulator 12 may be silicon dioxide between 60-200Š thick and the second insulator 13 may be aluminium oxide or silicon nitride about 300-700Š thick, or zinc sulphide. The semiconductor 11 may be silicon. The device is incorporated in a read/write/erase circuit including a write potential 20, an erase potential 21 and a readout at source 23. Non-destructive readout is performed by connecting the AC source to the device, whereupon a signal on a detector 22 determines the capacitance and hence the charge state of the device. The device may be incorporated in an IGFET, Fig. 2 (not shown) in which readout is accomplished by monitoring the value of source-drain current as affected by the presence of the channel inversion layer under the influence of the captured charge carriers.
申请公布号 SE398686(B) 申请公布日期 1978.01.09
申请号 SE19740002116 申请日期 1974.02.18
申请人 * WESTERN ELECTRIC COMPANY INCORPORATED 发明人 D M * BOULIN;D * KAHNG;J R * LIGENZA;W J * SUNDBURG
分类号 H01L21/8247;G11C16/04;H01L29/788;H01L29/792;(IPC1-7):01L29/78;11C11/34 主分类号 H01L21/8247
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