摘要 |
An integrated injection logic semiconductor device comprises an N type semiconductor substrate, a P type semiconductor layer laminated on said semiconductor substrate, and N type first region formed in a manner penetrating through said P type semiconductor layer to reach said N type semiconductor substrate, a first P type region formed in said first N type region, a second N type regionformed in said P type semiconductor layer, and a second P type region formed between said second N type region and said N type semiconductor substrate in a manner connected directly to said N type semiconductor substrate. An integrated injection logic circuit is comprised of a lateral NPN transistor whose emitter, base and collector are constituted by said first P type region, first N type region and P type semiconductor layer, respectively, and a vertical PNP transistor whose emitter, base and collector are constituted by said N type semiconductor substrate, P type semiconductor layer plus second P type region, and second N type region, respectively.
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申请人 |
TOKYO SHIBAURA ELECTRIC CO., LTD. |
发明人 |
TOKUMARU, YUKUYA;NAKAI, MASANORI;SHINOZAKI, SATOSHI;NAKAMURA, JUNICHI;ITO, SHINTARO;NISHI, YOSHIO |