Schottky transistor logic circuit - is formed by deep implantation in epitaxial layer to give switching time of order of 1 nanosecond

摘要

The Schottky transistor logic circuit is formed by a load transistor npn (pnp) and by an output transistor pnm (npm) of a type in which a epitaxial layer is deposited on a semiconductor substrate. The substrate is doped n+ (p+) when the epitaxial layer is doped n (p). In the epitaxial layer (A) doped n (P), is introduced by deep implantation, a zone (B) doped p(n). A part of the deep implantation zone (B) represents the base zone of the load transistor of type npn (pnp) as well as the emitter zone of the output transistor of type pnm (npm). The part of the epitaxial layer (A) situated below the deep implantation zone (B) represents the emitter zone of the load transistor (1, 1(A) above the deep implantation zone represents the load transistor type npn collector zone as well as the base one of the output transistor of type pnm (npm). The surface of the epitaxial layer has an electrode which forms with the epitaxial layer a Schottky Barrier and represents the connection terminal of the output transistor of type pnm (npm).