| 摘要 |
A junction field effect transistor of vertical type whose gate region is formed on the drain region so as to protrude into the source region side. This gate region is formed to have a sufficiently minute dimension by relying on either the selective etching method, the selective oxidizing method, or the selective chemical vapor deposition method, whereby the area of junction can be substantially reduced, resulting in a marked decrease in junction capacitance, and a high current capability can be obtained.
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