发明名称 Next address subprocessor
摘要 A subprocessor and a method for a digital computer processing a special class of programs wherein determination of the next processing program instruction address occurs simultaneously with execution of a preceding set of processing program instructions without incurring the delay inherent in performance of the intervening branch conditions.
申请公布号 US4062058(A) 申请公布日期 1977.12.06
申请号 US19760657812 申请日期 1976.02.13
申请人 THE UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE NAVY 发明人 HAYNES, LEONARD S.
分类号 G06F9/38;(IPC1-7):G06F9/20 主分类号 G06F9/38
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