Apparatus and methods for digital predistortion

摘要

The present disclosure provides advantageously flexible and effective methods, circuits and systems for digital predistortion. In one embodiment, a predistortion component circuit includes multiple configurable delay line pairs and corresponding configurable look-up tables. Each configurable delay line pair includes a first delay line for delaying an input data signal to provide a delayed input and a second delay line for delaying an input magnitude signal to provide a delayed input magnitude. Each configurable look-up table receives the delayed input magnitude from, and outputs a look-up value for, an associated delay line pair of the plurality of configurable delay line pairs. Other embodiments, aspects and features are also disclosed herein.

主权项

1. A predistortion component circuit comprising:
a plurality of configurable delay line pairs, wherein each said configurable delay line pair includes a first delay line for delaying an input data signal to provide a delayed input and a second delay line for delaying an input magnitude signal to provide a delayed input magnitude; a plurality of configurable look-up tables, wherein each said configurable look-up table receives the delayed input magnitude from, and outputs a look-up value for, an associated delay line pair of the plurality of configurable delay line pairs, and wherein each said configurable look-up table is configured with computed values that depend on a memory depth and a non-linearity order; and an address generator for receiving the input data signal and generating the input magnitude signal therefrom, wherein the second delay line in each said configurable delay line pair receives the input magnitude signal directly from the address generator.