| 摘要 |
To provide for multiple timing intervals in an entirely integrated circuit structure without replacement of external circuit components, the integrated circuit includes at least two charge resistors and two discharge resistors, each connected to the timing capacitor, and selectively controllable switches connected to the timing capacitor and to the charge and discharge resistors to interconnect the timing capacitor with respective charge and discharge resistors and the input terminals to the timing circuit, as commanded by the respective switch setting. The switches, preferably, are transistor switches which are externally controllable by enabling respective inputs to the integrated circuit structure. |
