| 摘要 |
<p>PURPOSE:To improve the extraction efficiency of a clock frequency component by inserting an emitter resistance to transistors(TRs) Q1, Q2, Q3, Q4, Q5 of 1st and 2nd differential amplifier circuits among differential amplifier circuits constituting the title circuit to expand the linear part of input versus output characteristic. CONSTITUTION:When a changeover switch 35 selects a bias voltage V, 1st, 2nd and 3rd differential amplifier circuits are operated in their linear operating range and as a square multiplication circuit efficiently. When the switch 35 selects a voltage V' of a DC voltage source 34, an input bias voltage difference V-V' is an input bias difference of a multiplication circuit and when the value of V-V' is selected properly, the collector current I4 is to be cut off. In this case, the current I3 is nearly equal to the current flowing to a constant current source 27. Thus, the switch 35 selects the voltage V with respect to an NRZ code and the switch 35 selects the voltage V' with respect to an RZ code to obtain an output including much of clock frequency component.</p> |
