Capacitive transformation circuit for input voltage - has two capacitors alternately connected to load through switches and gates

摘要

The circuit comprises a capacitor (5) connected to a terminal for the input voltage (U). A second capacitor (6) is connected to a second terminal for the input voltage. Capacitors (5, 6) are joined together by their other terminals The capacitors (5, 6) are each connected during time intervals to a load (11) through a transistor switch (7, 8) and a gate (9, 10). As the collector-emitter paths of the transistors are between the input terminals and the load, half the input voltage is developed at any one time. The completer circuit incorporates a pulse generator.