发明名称 Data processing system interface control - where send and receive stages control transmission of data between processor and set number of processes via multichannel bus
摘要 <p>An interface control for the transmission of data between a data processor and a number of processes is designed to minimise the number of data transmission channels. The system allows ready expansion of the number of processes controlled without hardware modifications. The data processor is connected over a multi-channel bus with a number of send/receive circuits within a general interface coupling stage. Each send/receive circuit has a send channel, each connected with a number of send/receive circuits within each process. Each send/receive circuit is dedicated to a specific peripheral. Coded character transmission is effected by conversion to serial bit from followed by conversion to parallel form after reception.</p>
申请公布号 NL7513894(A) 申请公布日期 1977.06.01
申请号 NL19750013894 申请日期 1975.11.28
申请人 COMPAGNIE HONEYWELL BULL TE PARIJS. 发明人
分类号 G06F13/38;H04L5/00;H04L25/45;(IPC1-7):06F3/04;06F11/10 主分类号 G06F13/38
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