发明名称 |
Matching of TTL to MOS circuits - allows integration of both, adjusting current levels using current reflecting transistors |
摘要 |
<p>The matching or interfacing arrangement links TTL and MOS circuits the design allows the two types of circuit to be integrated and provides the required input and output level adjustment allowing the MOS circuit to be interfaced with further TTL. The interface is governed by an input differential amplifier having a constant current power source. This controls the logic state of a following switching circuit feeding the MOS section. The current levels in the two circuits are governed by current reflecting transistors the final one of which provides a reference current governed by a resistor in its collector to supply circuit.</p> |
申请公布号 |
FR2340646(A1) |
申请公布日期 |
1977.09.02 |
申请号 |
FR19760003146 |
申请日期 |
1976.02.05 |
申请人 |
LABO CENTRAL TELECOMMUNICATIONS |
发明人 |
ANDRE CHARLES CHOSEROT, PIERRE GIRARD ET JEAN-PIERRE MICHEL PILLOU;GIRARD PIERRE;PILLOU JEAN-PIERRE MICHEL |
分类号 |
H03K19/018;(IPC1-7):03G11/00;03K19/08;03K5/01 |
主分类号 |
H03K19/018 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|