| 摘要 |
In a coder/decoder which operates on a subscriber-individual basis using the iterative method, with an intermediate register (FF1...FF8) which can be controlled by a counter (Ct) and which has a digital-analog converter (DAC) connected downstream and a comparator (Cp), a partial time span for digital-analog conversion and a further partial time span for analog-digital conversion are defined within a pulse frame by means of different counter settings of the aforementioned counter (Ct). The same digital-analog converter (DAC) is used twice in succession for D/A and A/D conversion. The counter (Ct) can be synchronised from time slot to time slot by the digital signals which are to be converted. In addition, the counter (Ct) can be activated to control the conversion of analog signals even in the absence of digital signals. The operating feed voltage can be supplied to the coder/decoder and the associated subscriber station (Tn) simultaneously with the activation of the counter (Ct). <IMAGE>
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