| 摘要 |
This specification describes an associative memory cell capable of performing logic functions. The cell comprises two transistors with their collectors connected to an output line and their emitters connected to an input line carrying either the true or complement of one variable. The bases of the two transistors can each be selectively connected to either the true and complement of a second variable or fixed at one of two reference or logic levels to permit the performing of sixteen different logic functions of the two input variables by the cell.
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