| 摘要 |
PURPOSE:To form the barrier parts in pattern dimension with high precision by a method wherein a semiconductor pellet is provided with multiple element group regions wherein multiple fine barrier parts are dispersedly formed in specific arrayal in a unit region in the specific maximum width not exceeding about specific value. CONSTITUTION:A pellet is provided with multiple element group regions 4 wherein multiple fine P<+> type regions 3 in the inverse conductivity type to the first conductivity type are dispersedly formed in specific arrayal on the surface of a unit region in the specific maximum width not exceeding about 500mum on the surface of the first conductivity type semiconductor substrate 10 wherein an N<-> type epitaxial later 2 is deposited e.g. on an N<+> type silicon layer 1. Next, respective elements are connected in parallel with one another by forming a barrier metallic layer and a metallic electrode 5 on the respective element groups 4. Accordingly, the change in resist shape due to the thermal shrinkage in the post-baking process after the formation of resist patterns is made notably smaller by performing PEP process using mask patterns divided into small unit regions and the resist. |
