| 摘要 |
A memory cell has a pair of n-ch drive MOS transistors, a pair of p-ch access MOS transistors. The access MOS transistor supply electric charge to storage nodes of the drive MOS transistors without using a resistive load. The gate insulation films of the drive MOS transistors have a thickness lower than the thickness of the gate insulation films of the access MOS transistors for achieving stable and high-speed operation of the memory cell.
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