发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To improve the executing efficiency of an instruction by providing a 2nd address conversion buffer that can be retrieved by the values of the base register number and the index register number which are designated by the instruction. CONSTITUTION:The 2nd address conversion buffer 8 defines the coupled value of a base address 104 and the index value 105 which are designated by the instructions respectively as an address and can freely store a physical address corresponding to said address as well as a valid bit showing whether the stored physical address is valid or not. Then the operand data 111 can be taken out in a 2nd cycle for execution of instructions which is faster than the conventional cycle by one cycle as long as a physical page address 205 of the data 111 is stored in the buffer 8 when the address 104 and the value 105 are supplied by each instruction. Thus the executing efficiency of an instruction is improved.
申请公布号 JPH01177145(A) 申请公布日期 1989.07.13
申请号 JP19880000811 申请日期 1988.01.06
申请人 NEC CORP 发明人 YAMAZAKI ATSUSHI
分类号 G06F12/10 主分类号 G06F12/10
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