发明名称 DELAY CIRCUIT
摘要 PURPOSE: To provide a delay circuit which can be adjusted as the function of set point delay that can become the form of a digital parameter. CONSTITUTION: The circuit contains a fixed delay circuit D1 supplying a delay signal e1 on an input signal e0 . The circuit furthermore contains a combination circuit C supplying a combination signal fK obtained by weighting the input signal e0 and the delay signal e1 , and the overlap of integral effect. When the combination circuit C receives only the input signal e0 , fixed delay T is made smaller than the transition time which the combination signal fK has.
申请公布号 JPH0653790(A) 申请公布日期 1994.02.25
申请号 JP19930060667 申请日期 1993.03.19
申请人 BULL SA 发明人 RORAN MARUBO;ANDORIYUU KOFUREE;MISHIERU KONBU;JIYANNKUROODO RUBIAN;RUZA NEZAMUZADEEMUUSABI
分类号 H03K5/00;H03K5/13 主分类号 H03K5/00
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