| 摘要 |
A switched capacitor array circuit and method, with the array circuit being coupled between an input node and an output node and which is capable of providing multiple gain states. The array circuit includes an L band of capacitor positions disposed between the input node and a third node, typically the circuit common, an M bank of capacitor positions coupled between the input and output nodes and an N bank of capacitor positions coupled between the output node and the third node. Each of the L, M and N banks of capacitor positions includes series and parallel capacitor positions. In one embodiment, the array includes first, second and third capacitors together with switching circuitry and control circuitry. The control circuitry causes the switching circuitry to switch the array circuit between a common phase configuration and a gain phase configuration so as to provide a gain state value Gsc. In the gain phase configuration, the first and second capacitors are disposed in one of the L, M and N banks of capacitor positions. The third capacitor is disposed in a different one of the L, M and N banks of capacitor positions in the common phase configuration. When switching from the common phase configuration to the gain phase configuration, at least one of the first, second and third capacitors is moved from a common phase configuration position to a gain position different than the common phase configuration position. The capacitors that are disposed in the series capacitor position in the common phase configuration are disposed in the parallel capacitor position in the gain phase configuration and the capacitors that are disposed in the parallel capacitor position in the common phase configuration are disposed in the series capacitor position in the gain phase configuration.
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