发明名称 REFERENCE VOLTAGE GENERATING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To realize stable and highly precise high speed start even under a lower power supply voltage without substantially increasing the circuit area. SOLUTION: A current mirror circuit is formed of NMOS transistors 10 and 12, and the same drain currents I are allowed to flow. A current mirror circuit is formed of PMOS transistors 14 and 16, and the drain currents I are supplied to the current mirror circuit. A resistance 18 applies offset between the respective source voltages of the PMOS transistors 14 and 16. A capacitor 22 for start-up is connected between the gate/drain of the diode-connected NMOS transistor 10 and the terminal of a positive electrode side power supply voltage VDD. Also, a capacitor 24 for start-up is connected between the gate/ drain of the diode-connected PMOS transistor 16 and a negative electrode side power supply voltage VSS.
申请公布号 JP2002328732(A) 申请公布日期 2002.11.15
申请号 JP20010136503 申请日期 2001.05.07
申请人 TEXAS INSTR JAPAN LTD 发明人 NISHIMURA MASAHITO
分类号 H01L27/04;G05F3/26;H01L21/822;H03F3/343;(IPC1-7):G05F3/26 主分类号 H01L27/04
代理机构 代理人
主权项
地址