| 摘要 |
PROBLEM TO BE SOLVED: To improve the ratio of the polishing speed of a conductive layer to that of a barrier metal layer and prevent dishing by specifying a dishing value with respect to the layer thickness of a recessed quantity of the center part of the plurality of conductive layers on the barrier metal layer having an opening embedded on the barrier metal layer to the layer thickness. SOLUTION: On a silicon substrate 1, a 600 nm thick SiO2 layer 4 is deposited by plasma CVD method, via a SiO2 layer 2 to be a base insulating layer and a W wiring layer 3, then a photoresist is applied to a thickness of 0.6μm. Then, etching is performed by using a photoresist pattern, which is formed through exposure and patterning by using i-rays (365 nm) as a mask, and a contact hole 5, having a width of 0.5μm, a depth of 1μm and an aspect ratio of 2, is formed so as to reach the W wiring layer. Then, polishing is performed with an alumina powder as a base for a slurry, at a chemical polishing pressure of 2 psi and the number of revolutions of 25 rpm for 1-2 minutes of polishing, a Cu layer 7 and a TiN layer 6 deposited to a height of the contact hole 5 provided on the SiO2 layer 2 or higher are removed and an embedded Cu contact electrode is formed.
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