发明名称 SINE AND COSINE TRANSFORMATION CIRCUIT
摘要 PURPOSE:To reduce the required storage area of a ROM in the sine and cosine transformation circuit. CONSTITUTION:Data inputted from input terminals 11-1, 11-2,...11-n are at first inputted to a combination logic circuit 2, in which the data are transformed as required and the result is inputted to an address terminal of a ROM 1. A transformation value with respect to each address based on a sine and a cosine value is stored in the ROM 1, and when the address is inputted to the ROM 1, the transformation value corresponding to the address is read and outputted to a combination logic circuit 3. The data read from the ROM 1 are transformed in the combination logic circuit 3 through data inputted from the input terminals 11-1, 11-2,...,11-n and outputted through output terminals 12-1, 12-2,...,12-m. The data storage capacity in the ROM 1 is much reduced by adopting the configuration to connect the combination logic circuits 2, 3 to the prestage and the post- stage of the ROM 1.
申请公布号 JPH0659864(A) 申请公布日期 1994.03.04
申请号 JP19920206367 申请日期 1992.08.03
申请人 NEC CORP 发明人 KAYANO MINORU
分类号 G06F7/548;(IPC1-7):G06F7/548 主分类号 G06F7/548
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