发明名称 SEMICONDUCTOR DEVICE AND THE METHOD OF MANUFACTURING THE SAME
摘要 A semiconductor device according to the invention includes p-type well region 3 and n+ source region 4, both formed selectively in the surface portion of n− drift region 2; trench 6 in contact with n+ source region 4 and extending through p-type well region 3 into n− drift region 2; field plate 8 formed in trench 6 with first insulator film 7 interposed between the trench 6 inner surface and field plate 8; gate electrode 10 formed in trench 6 with second insulator film 9 interposed between the trench 6 side wall and gate electrode 10, gate electrode 10 being formed above field plate 8; first insulator film 7 being thicker than second insulator film 9; and n− lightly doped region 21 in n− drift region 2, n− lightly doped region 21 crossing under the bottom surface of trench 6 from the corner portion thereof, n− lightly doped region 21 covering the bottom surface of trench 6. ;The semiconductor device according to the invention and the method of manufacturing the semiconductor device according to the invention facilitate lowering the ON-state voltage, preventing the breakdown voltage from lowering, lowering the gate capacitance, and reducing the manufacturing costs.
申请公布号 US2016233090(A1) 申请公布日期 2016.08.11
申请号 US201615133627 申请日期 2016.04.20
申请人 FUJI ELECTRIC CO., LTD. 发明人 NISHIMURA Takeyoshi
分类号 H01L21/265;H01L29/40;H01L29/78;H01L21/225;H01L29/66 主分类号 H01L21/265
代理机构 代理人
主权项 1. A method of manufacturing a semiconductor device, the method comprising the steps of; (a) forming a trench in a first semiconductor region of a first conductivity type; (b) introducing an impurity of the first conductivity type selectively into a surface portion of the first semiconductor region for setting a concentration of the impurity of the first conductivity type in the surface portion of the first semiconductor region exposed to a side wall of the trench excluding a corner portion of the trench to be high; (c) forming a first electrode in the trench with a first insulator film interposed between the side wall of the trench and the first electrode, step (c) being conducted after the step (b); (d) forming a control electrode in the trench with a second insulator film interposed between the side wall of the trench and the control electrode, the control electrode being formed above the first electrode; and (e) diffusing the impurity of the first conductivity type introduced into the surface portion of the first semiconductor region for forming another semiconductor region of the first conductivity type on the side wall of the trench, the another semiconductor region being not so deep as to reach the corner portion of the trench, the another semiconductor region being doped more heavily than the first semiconductor region.
地址 Kawasaki-shi JP