| 发明名称 |
Selective electroless plating of vias in VLSI devices |
| 摘要 |
Selective electroless plating of cobalt or nickel is utilized to form conductive plugs in high-aspect-ratio vias in VLSI devices. Particularly good results are obtained when an active or catalytic film is formed on the via bottoms to serve as a plating base.
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| 申请公布号 |
US4692349(A) |
申请公布日期 |
1987.09.08 |
| 申请号 |
US19860835355 |
申请日期 |
1986.03.03 |
| 申请人 |
AMERICAN TELEPHONE AND TELEGRAPH COMPANY, AT&T BELL LABORATORIES |
发明人 |
GEORGIOU, GEORGE E.;POLI, GARY N. |
| 分类号 |
H01L21/3205;C23C18/18;C23C18/32;H01L21/288;H01L21/768;H01L23/522;(IPC1-7):C23C18/34 |
主分类号 |
H01L21/3205 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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