发明名称 High speed single chip digital video network apparatus
摘要 A remote connection digital processing device with network capability includes on a single chip asynchronous transfer mode (ATM) network protocol processing system interconnection circuits and Motion Picture Experts Group (MPEG) decoder circuits. The ATM interconnection circuits include a physical-layer medium dependent (PMD) unit connected to an ATM network. A transmission convergence (TC)/Framer unit is connected to the PMD unit. An ATM segmentation and reassembly (SAR) unit is connected to the PMD unit. Packet conversion logic is coupled to the ATM SAR unit for converting ATM packets to MPEG format. The MPEG decompression decoder circuits include a demodulator decryption unit coupled to the packet conversion logic. A video decoder is coupled to the demodulator decryption unit. An audio decoder is coupled to the demodulator decryption circuit. A display is coupled to the video decoder. Audio output devices are coupled to the audio decoder.
申请公布号 US5872784(A) 申请公布日期 1999.02.16
申请号 US19950412862 申请日期 1995.03.28
申请人 LSI LOGIC CORPORATION 发明人 ROSTOKER, MICHAEL D.;DAANE, JOHN P.;DESAI, SANJAY;STELLIGA, D. TONY
分类号 G06F13/12;G10L19/00;H04L12/26;H04L12/56;H04N5/00;H04N7/24;H04N7/26;H04N7/50;H04Q11/04;(IPC1-7):H04L12/56;H04N7/04 主分类号 G06F13/12
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