发明名称 SERIAL BUS TESTING DEVICE
摘要 PROBLEM TO BE SOLVED: To rapidly execute the analysis of data that are taken into a capture memory from a high-speed serial bus. SOLUTION: When a physical layer circuit 4n receives the transmission signal of a series of packets from the high-speed serial bus 1 and outputs data to a link layer circuit 5n , a data extraction/writing circuit 60 writes the data into a capture memory 70. Also, an index information analysis circuit 91 discriminates the packet in parallel, analyzes the type and the transmission speed of the packet, and writes at an index memory 90 as index information, by associating with a position on the capture memory 70. After capturing, a controller 30n refers to the index memory 90 and searches for a desired packet, reads the data of a desired packet from the capture memory 70 for discriminating the presence or absence of errors, and displays the data on a display 11, together with index information and packet configuration data.
申请公布号 JP2002261770(A) 申请公布日期 2002.09.13
申请号 JP20010055855 申请日期 2001.02.28
申请人 KENWOOD TMI:KK;KENWOOD CORP 发明人 SHINOZUKA SATORU
分类号 H04L12/40;H04L12/28;H04L29/14;(IPC1-7):H04L12/28 主分类号 H04L12/40
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