发明名称 WAFER TRANSPORT CONTROL METHOD
摘要 PURPOSE: To reduce a lead time until finishing of the entire process when a plurality of kinds of wafers are processed in a multi-chamber semiconductor equipment for performing a leaf processing by a method wherein specific first to third steps are respectively performed to decide a chamber to be used. CONSTITUTION: There are provided a first step of deciding a step corresponding to a kind of a wafer 17 received in a wafer cassette 21; a second step of deciding chambers 12 to 15 to be used in the step decided in the first step; and a third step of setting while the chambers 12 to 15 decided in the second step are used. The first to third steps are performed for a plurality of kinds of wafers 17 received in the wafer cassette 21 so as to decide the chambers 12 to 15 used when the plurality of kinds of wafers 17 are received in the wafer cassette 21. For example, a loading chamber 11, the process chambers 12 to 15 and an unloading chamber 16 are arranged around a transfer chamber 10.
申请公布号 JPH08330379(A) 申请公布日期 1996.12.13
申请号 JP19950133265 申请日期 1995.05.31
申请人 TOSHIBA CORP 发明人 KAKEHASHI HIDEKI;FUJITAKE KOJI
分类号 B01J19/00;H01L21/02;H01L21/677;H01L21/68;(IPC1-7):H01L21/68 主分类号 B01J19/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利