发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To improve degree of freedom of a mounting substrate by providing a plurality of circuit elements and circuit wiring as well as a wiring path not connected to any of these and to be connected between at least 2 terminals of a row of mutually different terminals. SOLUTION: When it is desired to make a FET intermediate stage for handling a large signal and a FET output stage in a 3-stage power amplification circuit in the form of an IC, gate leads (G1) and (G2) of the 2 FETs to be made in the IC form are arranged as intersected with drain leads (D1) and (D2) thereof, that is, the drain lead (D2) is disposed next to the gate lead (G1) and the gate lead (G2) is next to the drain lead (D1) to thereby form a signal transmission path within the IC. That is, leads (J1) and (J1') are provided as external IC leads, and the wiring path to be connected to these leads (J1) and (J1') is formed within the IC. In other words, the wiring path not connected to any of internal elements and wiring is provided to be connected at its both ends with the leads (J1) and (J1'), respectively.
申请公布号 JPH0927507(A) 申请公布日期 1997.01.28
申请号 JP19950196179 申请日期 1995.07.07
申请人 HITACHI LTD 发明人 ITO MAMORU
分类号 H01L21/60;H01L23/52;H03F3/195 主分类号 H01L21/60
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