发明名称 DAARINTONTORANJISUTA
摘要 PURPOSE:To realize secure shut-off state and shorten the time required for the shut-off state by preventing the influence by a parasitic transistor. CONSTITUTION:An output transistor 12 is constructed by deciding an N1 layer as the collector, a P2 layer as the base, and an N3 layer as the emitter, and a drive transistor 14 is constructed by deciding the N1 layer as the collector, the P2 layer as the base, and an N4 layer as the emitting. On the other hand, a transistor 40 is constructed by deciding the P2 layer as the collector, an N5 layer as the base, and a P6 layer formed in the N5 layer as the emitter, which is connected between the base and the emitter of the drive transistor 14. At the time of non-conduction state, the P6 layer and the N5 layer are reversely biased, resulting in the conduction of the transistor 40, but, since the N1 layer and the P2 layer are reversely biased, the output transistor 12 does not conduct. Besides, the depth of the N5 layer is formed more shallowly than those of the N3 and N4 layers in order to hasten the extinction of residual carriers in the P2 layer in the lower part of the N5 layer.
申请公布号 JPH0236061(B2) 申请公布日期 1990.08.15
申请号 JP19820220633 申请日期 1982.12.15
申请人 SANSHA ELECTRIC MFG CO LTD 发明人 UEKAWA ATSUYA;KOBAYASHI RYOICHI
分类号 H01L21/8222;H01L21/331;H01L27/082;H01L29/72;H01L29/73 主分类号 H01L21/8222
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