Data demodulator carrier phase error detector.

摘要

An arrangement for producing a phase error signal representing the phase error between a received phase-modulated signal and a locally generated carrier signal. The arrangement comprises two exclusive-OR gates (4) and (5) to which the received signal q(t) and sine and cosine versions s(t) and c(t) of the carrier signal are applied. The outputs of the two gates (4) and (5) control according to their level (high or low), the up/down counts of respective up/down counters (6) and (7). These counts are latched periodically by latches (9) and (10) and the latched values are modified in 2's complementers (11) and (12) and then summed in a binary adder (13) to produce a resultant phase error signal (z).