发明名称 DENRYOKUZOFUKUSOCHINOREBERUKANSHISOCHI
摘要 PURPOSE:To form an output level monitor circuit of each power amplifier with simple configuration and to facilitate the adjustment when power of common transmission signals is amplified and synthesized by N-sets of power amplifiers connected in parallel and sending the synthesized signal. CONSTITUTION:Directional couplers 31-3N and 51-5N extract respectively each power of a propagation wave and a reflected wave being outputs of N-sets of power amplifiers 11-1N. A level of each extracted output is detected by detectors 42-4N and 52-5N and given to multiplexers 8, 72 in which the outputs are subject to time division multiplex processing. The level of the multiplexed output is compared with reference levels 70, 74 by comparators 10, 73, the level of each comparison output is compared with reference levels 70, 74 and each comparison result is demultiplexed by demultiplexers 71, 75 synchronously with a time division multiplex timing, and fed to control sections 131-13N corresponding to each power amplifier respectively. Then since the level comparison section and the reference level adjustment section are used in common, the structure is simplified and the reference level is adjusted in common without dispersion.
申请公布号 JP2630250(B2) 申请公布日期 1997.07.16
申请号 JP19940072671 申请日期 1994.03.16
申请人 NIPPON DENKI KK 发明人 YOSHINO EIJI
分类号 H03F1/52;H04B17/00 主分类号 H03F1/52
代理机构 代理人
主权项
地址