Guarded planar PN junction semiconductor device

摘要

A semiconductor device with at least one planar PN junction is provided in a semiconductor body having at least one major surface. The body has first and second impurity regions of opposite conductivity type forming a first PN junction therebetween. The first impurity region is positioned adjoining the major surface, and the second impurity region is positioned in interior portions of the body adjoining the first impurity region. The second impurity region has an impurity concentration profile and thickness to support a space-charge region on application of a given reverse bias voltage across the PN junction.