MANUFACTURE OF MEMORY DEVICE

摘要

forming a first material layer on a substrate having a transistor and a bit line; forming a first pattern defined lay cells and consisting of a second material layer; forming a contact hole for electrical connecting between the source region and the storage electrode by removing the material layer positioned on the source region; forming a second conduction layer over the resulting structure; forming a spacer of the second conduction layer on the side wall of the first pattern and on the inner wall of the contact hole by anisotropic etching; and removing the first pattern. The method increases capacitance within a limited unit cell.