FIELD EFFECT TRANSISTOR WITH RAISED SOURCE/DRAIN FIN STRAPS

摘要

Therefore, disclosed above are embodiments of a multi-fin field effect transistor structure (300 or 400) (e.g., a multi-fin dual-gate FET or tri-gate FET) that provides low resistance strapping of the source/drain regions (41, 42) of the fins (60a-c), while also maintaining low capacitance to the gate (80) by raising the level of the straps (71, 72) above the level of the gate (80). Embodiments of the structure of the invention incorporate either conductive vias (31, 32) (see structure 300) or taller source/drain regions (see structure 400) in order to electrically connect the source/drain straps (71, 72) to the source/drain regions (41, 42) of each fin (60a-c). Also, disclosed are embodiments of associated methods of forming these structures.