发明名称 IMAGE PROCESSOR AND INTEGRATED CIRCUIT FOR THE SAME
摘要 <p>A digital image signal has a frequency a quarter of the frequency of a dot clock signal and is latched in 4 latches in accordance with 4 latch clock signals whose phases are different from each other by one period of the dot clock signal. The digital image signal is further latched in a common latch in accordance with a common latch signal and one set of digital image signals of continuous 4 pixels is outputted as a digital image signal. The digital image signal is written in the continuous memory areas of a frame memory in accordance with a writing sampling clock signal whose frequency is a quarter of the frequency of the dot clock signal. The number of latches used is adjusted in accordance with the frequency of an analog image signal. With this constitution, the image signal with a high frequency can be processed easily.</p>
申请公布号 WO1999027494(P1) 申请公布日期 1999.06.03
申请号 JP1998005321 申请日期 1998.11.26
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址