发明名称 SYSTEM AND METHOD FOR OPTIMIZING POWER IN PIPELINED DATA CONVERTERS
摘要 A pipelined data converter current biasing system employs a frequency-to-voltage converter (FVC) operational to convert a plurality of desired sampling frequencies to a plurality of output voltages and a voltage-to-current (V to I) converter operational to convert the plurality of output voltages to a plurality of bias currents. The plurality of bias currents function to bias the data converter operational amplifiers such that the data converter power consumption is dependent on the plurality of sampling frequencies in a way that optimizes power consumed by the data converter with respect to the sampling frequency.
申请公布号 US2002167433(A1) 申请公布日期 2002.11.14
申请号 US20010848635 申请日期 2001.05.03
申请人 SOUNDARAPANDIAN KARTHIKEYAN;SOENEN ERIC G.;VISWANATHAN T. L. 发明人 SOUNDARAPANDIAN KARTHIKEYAN;SOENEN ERIC G.;VISWANATHAN T. L.
分类号 H03M1/00;H03M1/06;H03M1/44;(IPC1-7):H03M1/12 主分类号 H03M1/00
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