发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To easily diagnose a failure of a semiconductor integrated circuit with a built-in self-test circuit for a memory. <P>SOLUTION: The semiconductor integrated circuit 50 is provided with a BIST circuit 1 and a memory collar 2. The memory collar 2 is provided with a memory output result analyzing circuit 3 and a memory cell 21. In BIST operation, when a defect is detected, the BIST operation is completed while the detected defect is stored in a fetching register 31 of the memory output result analyzing circuit 3. When a failure detection signal S109 outputted from a two-input OR circuit OR1 of the memory output result analyzing circuit 3 is inputted to a diagnostic data transferring/storing circuit 16 of the BIST circuit 1, the diagnostic data transferring/storing circuit 16 starts its operation. When a shift enable signal S108 is outputted from the diagnostic data transferring/storing circuit 16, the data stored in the fetching register 31 is automatically transferred to the diagnostic data transferring/storing circuit 16. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009059434(A) 申请公布日期 2009.03.19
申请号 JP20070227000 申请日期 2007.08.31
申请人 TOSHIBA CORP 发明人 TOKUNAGA CHIKAKO;YASUKURA KENICHI
分类号 G11C29/12;G11C11/401;G11C16/02 主分类号 G11C29/12
代理机构 代理人
主权项
地址
您可能感兴趣的专利