| 摘要 |
PROBLEM TO BE SOLVED: To realize a generating circuit for a drive waveform in a flat display which has high output speed with less memory capacity by outputting an output indication of data to a data register in accordance with data for control outputted from a memory means. SOLUTION: A control circuit 105 decodes data for control received from a memory element 103, and outputs a load signal to one block or plural blocks out of registers 102a-102d. Also, the circuit outputs an enable-signal to all of arbitrary pulse generating circuits 101a-101d. Further, the control circuit 105 controls a value of an address generating circuit 104 and count operation. Plural pulse generating circuits 101a-101d receives a pulse value generated by an enable-signal from the registers 102a-102d and data indicating output width and operated. Therefore, as an arbitrary waveform is outputted from plural arbitrary pulse generating circuits, arbitrary drive waveforms Wa-Wc can be outputted at high speed synchronizing with an external synchronizing signal as an whole output waveform. |
