Shift register and shift register system with controllable transfer stages

摘要

Through the step number control transfer gate activated by the step number control signal, the input data is sent into a specific transfer step of the shift register, and the data transferred from the specific transfer step is delivered from the output step. By selecting an arbitrary step number control transfer gate, the input transfer step is varied without changing the output step to change to an arbitrary data delay length. Therefore, only by increasing the driving capacity of the driver of the input data, a shift register short in delay time, small in increase of integration area, and low in power consumption will be obtained.